APPARATUS AND METHOD FOR REDUCING POWER CONSUMPTION OF A PROCESSOR BY ESTIMATING ENGINE LOAD

A computer system has a processor and a queue for storing instructions for execution by the processor. The processor is capable of being clocked at a plurality of different clock frequencies. In one embodiment, the clocking frequency is determined by estimating a short or long term load associated with the stored instructions. In another embodiment, the clocking frequency is determined by analyzing a set of the stored instructions.