RESISTOR LADDER INTERPOLATION FOR PGA AND DAC

Patent №

US 7,616,144

Granted

2009-11-10

Filed 2007

Owner

BROADCOM CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

11857417

A voltage interpolation circuit includes a resistive ladder connected between ground and a voltage input and having a plurality of resistors with voltage taps between the resistors. An amplifier (optionally) has first and second capacitors connected together at their respective first terminals and to an input of the amplifier. A first plurality of switches connect respective taps to a second terminal of the first capacitor. A second plurality of switches connect the respective taps to a second terminal of the second capacitor. An output voltage is interpolated by controlling the first and second pluralities of switches.

AI hardwareH03K 17/04106H03M 1/204H03M 1/365

AI classification

AI hardware0.59
Natural language0.00
Planning0.00
Machine learning0.00
Vision0.00
Knowledge representation0.00
Speech0.00
Evolutionary computation0.00

Ownership

BROADCOM CORPORATION

assignment · 202930434

Assignors

MULDER, JAN, VAN DER GOES, FRANCISCUS MARIA LEONARDUS, WESTRA, JAN, VAN DER PLASSCHE, RUDY

On an employer assignment, the assignors are typically the inventors.

From the same owner

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