Patent №
US 7,617,364
Granted
2009-11-10
Filed 2007
Owner
—
Lab
—
AI components
1
hardware
Assignment
None on record
Dataset
AIPD
2023_r1 edition
Application
11743697
A method and system for memory management are provided. The system includes a tag cache in communication with one or more cache devices in a storage hierarchy. The tag cache includes tags of recently accessed memory blocks, each tag corresponding to one of the memory blocks and including tag contents. The tag contents control which memory lines of the corresponding memory block are prefetched into at least one of the cache devices. The tag contents further include a bit to control prefetching of memory lines from a next virtual memory block, the bit referred to as a next virtual memory block bit. The next virtual memory block bit in a preceding memory block in a virtual address space is set to a prefetch status when the preceding memory block tag is in the tag cache.