DYNAMIC VOLTAGE SCALING FOR SELF-TIMED OR RACING PATHS

Patent №

US 7,622,979

Granted

2009-11-24

Filed 2007

Owner

MONTALVO SYSTEMS, INC.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

11932311

A timing-constrained circuit (e.g., a self-timed circuit) of optimal performance is achieved by allowing the delay of the circuit to be changed dynamically as a function of operating conditions (e.g., operating voltages or temperatures). The delay of timing signals in the timing-constrained circuit for a given operating condition may be selected to have the minimum margin for that operating condition among the available delays to maximize performance over the entire dynamic range of operating conditions.

AI hardwareH03H 11/265G11C 7/08G11C 7/22G11C 11/4076H03K 19/00384H03K 19/018521G11C 7/04H03K 2005/00019

AI classification

AI hardware0.91
Evolutionary computation0.12
Natural language0.01
Knowledge representation0.00
Machine learning0.00
Speech0.00
Vision0.00
Planning0.00

Ownership

MONTALVO SYSTEMS, INC.

assignment · 200550886

Assignors

BHATIA, AJAY, KHANNA, RAJESH

On an employer assignment, the assignors are typically the inventors.

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