METHOD AND DEVICE FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT

A method and device for designing a semiconductor integrated circuit that easily reduces off leakage current. Wires connected to input terminals of a standard cell are exchanged with one another and a gate net list is changed so as to reduce off leakage current in accordance with a net probability and a current consumption table. The net probability is the probability of the state an input of the standard cell can take and is generated through an RTL function simulation and a gate level function simulation. The current consumption table is stored in a technology library storage.