Patent №
US 7,660,708
Granted
2010-02-09
Filed 2005
Owner
MICRON TECHNOLOGY, INC.
Lab
—
AI components
2
ml · hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
11200449
A methodology for combining two or more S-parameter blocks/matrices (each representing a circuit or network, or the interconnection between a circuit or network) into a single S-matrix are described. Such a matrix may be beneficially used to simulate the circuit or network represented by the multiply interconnected circuits or networks.
AI classification
Machine learning1.00
AI hardware0.99
Planning0.16
Knowledge representation0.07
Speech0.00
Natural language0.00
Evolutionary computation0.00
Vision0.00
Ownership
MICRON TECHNOLOGY, INC.
assignment · 168780410
Assignors
CHEN, HOUFEI
On an employer assignment, the assignors are typically the inventors.
From the same owner
ROUTING SPIKE MESSAGES IN SPIKING NEURAL NETWORKSUS 12,682,224 · 2026OPTIMIZATION OF SOFT BIT WINDOWS BASED ON SIGNAL AND NOISE CHARACTERISTICS OF MEMORY CELLSUS 12,665,022 · 2026SYSTEM FOR PROVIDING ENHANCED VISION TRANSFORMER BLOCKS FOR COMPUTER VISIONUS 12,657,905 · 2026DATA CHARACTERISTIC-BASED ERROR CORRECTION SYSTEMS AND METHODSUS 12,650,899 · 2026OPTIMIZED SENSOR FUSION IN DEEP LEARNING ACCELERATOR WITH INTEGRATED RANDOM ACCESS MEMORYUS 12,651,154 · 2026LIFESPAN FORECASTING OF MEMORY DEVICES AND PREDICTIVE DEVICE HEALTH MANAGEMENTUS 12,645,366 · 2026VOLATILE MEMORY TO NON-VOLATILE MEMORY INTERFACE FOR POWER MANAGEMENTUS 12,645,376 · 2026ANALOG COMPUTING CONFIGURED MEMORYUS 12,638,972 · 2026