TRACE OPTIMIZATION IN FLATTENED NETLIST BY STORING AND RETRIEVING INTERMEDIATE RESULTS
Patent №
US 7,676,773
Granted
2010-03-09
Filed 2007
Owner
LSI LOGIC CORPORATION
+1 more
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
11724143
A method of trace optimization in a flattened netlist of a circuit is disclosed. The method generally includes the steps of (A) generating a first total result by tracing a first path through the flattened netlist, (B) writing an intermediate result in a memory, the intermediate result characterizing a module having a plurality of instances in the circuit, (C) adding the intermediate result as read from the memory to the first total result upon crossing each of the instances of the module along the first path and (D) writing the first total result into the memory.
AI classification
Ownership
LSI LOGIC CORPORATION
assignment · 191100128
LSI CORPORATION
merger · 238130436
Assignors
RANGASAMY, UMESH, ADIGA, SRINIDHI
On an employer assignment, the assignors are typically the inventors.