FAST DECODING OF REED-SOLOMON CODE

Patent №

US 7,685,503

Granted

2010-03-23

Filed 2006

Owner

INTEL CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

11472833

A technique to perform fast decoding of a Reed-Solomon code. A first multiplier unit multiplies a matrix Bh with a column vector v using common adders to produce a column vector v1. The vector v represents one of an error locator polynomial, an error evaluator polynomial, and a derivative polynomial for a (n, k) Reed-Solomon code. The matrix Bh is over GF(2) including first h columns of a matrix B. A second multiplier unit multiplies non-unity components of a column vector A with non-zero components of the column vector v1 component-wise in GF(q) to produce a column vector v2, q being equal to n+1. A third multiplier unit multiplies diagonal sub-matrices of a matrix C with corresponding components of the column vector v2 in GF(2) to produce a column vector v3.

AI classification

AI hardware0.96
Speech0.00
Natural language0.00
Vision0.00
Knowledge representation0.00
Machine learning0.00
Evolutionary computation0.00
Planning0.00

Ownership

INTEL CORPORATION

assignment · 207160819

Assignors

OVCHINNIKOV, ANDREI, KROUK, EVGUENII, EFIMOV, ANDREY, BELOGOLOVY, ANDREY

On an employer assignment, the assignors are typically the inventors.

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