DIGITAL PHASE DETECTOR FOR A PHASE LOCKED LOOP

According to one exemplary embodiment, a digital phase detector includes a phase/frequency detector, where the phase/frequency detector is configured to receive a reference signal and a divided oscillator feedback signal and output a first pulse-width modulated signal and a second pulse-width modulated signal. The digital phase detector also includes a first time-to-digital converter, where the first time-to-digital converter is coupled to the phase/frequency detector. The first time-to-digital converter is configured to receive and convert the first pulse-width modulated signal to a first digital number. The digital phase detector further includes a second time-to-digital converter coupled to the phase/frequency detector and configured to receive and convert the second pulse-width modulated signal to a second digital number. The digital phase detector further includes a summation element, where the summation element is configured to subtract the second digital number from the first digital number and output a digital phase error signal.