APPARATUS AND METHOD FOR TESTING AND DEBUGGING AN INTEGRATED CIRCUIT

Patent №

US 7,721,167

Granted

2010-05-18

Filed 2008

Owner

Lab

AI components

1

hardware

Assignment

None on record

Dataset

AIPD

2023_r1 edition

Application

12154896

A system for receiving Joint Task Action Group (JTAG) data bits from a device under test includes a deserializer that receives serial messages from the device under test and forms data frames based on the serial messages. A frame sync module communicates with the deserializer and forms JTAG data bits based on the data frames. N virtual JTAG test access ports (VTAPs), each having an input and an output. The N VTAPs are connected in a daisy chain and the input of a first VTAP receives the JTAG data bits from the frame sync module.

AI hardwareG01R 31/3177G01R 31/31705G01R 31/318572G06F 11/2236

AI classification

AI hardware0.94
Vision0.00
Planning0.00
Evolutionary computation0.00
Machine learning0.00
Speech0.00
Natural language0.00
Knowledge representation0.00
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