Patent №
US 7,725,845
Granted
2010-05-25
Filed 2007
Owner
CADENCE DESIGN SYSTEMS, INC.
Lab
—
AI components
3
ml · evo · hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
11678594
Method and system for chip optimization using model based verification (MBV) tool provide more accurate verification in determining hotspots and their characteristics. The MBV and the layout optimizer are implemented within a feedback loop. This type of verification allows for the MBV tool to provide hints, constraints and hotspot information to the layout optimizer. In addition, the model-based simulation results can be used to automatically fix the circuit designs and allow for specialized optimization flow for standard cell libraries.
AI classification
Ownership
CADENCE DESIGN SYSTEMS, INC.
assignment · 193980010
Assignors
WHITE, DAVID, RUEHL, ROLAND, NEQUIST, ERIC
On an employer assignment, the assignors are typically the inventors.