Patent №
US 7,725,899
Granted
2010-05-25
Filed 2006
Owner
—
Lab
—
AI components
1
hardware
Assignment
None on record
Dataset
AIPD
2023_r1 edition
Application
11598781
An apparatus for communicating between lock step is incorporated on two or more processors operating in a lock step mode. Each of the processors includes processor logic to execute a code sequence, and an identical code sequence is executed by the processor logic. The apparatus further includes a processor-specific resource referenced by the code sequence. A multiplexer is coupled to the processor-specific resource, and is controlled to read data based on the identification. Coupled to the processors is a lock step logic block operable to read and compare the output of each of the processors. The lock step logic determines if operation of the processors is in a lock step mode or in an independent processor mode. Such determination may be made by the lock step logic turning off, for example.