Patent №
US 7,791,950
Granted
2010-09-07
Filed 2007
Owner
IMPINJ, INC.
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
11748541
NVM arrays include rows and columns of NVM cells comprising a floating gate and a four transistor storage element. Supply voltage for selected storage elements is turned off during a programming and an erase mode. Isolation transistors for each NVM cell or for each row of NVM cells may be used to control the supply voltage.
AI classification
Ownership
IMPINJ, INC.
assignment · 211570833
Assignors
WANG, BIN, WANG, CHIH-HSIN, COLLERAN, WILLIAM T.
On an employer assignment, the assignors are typically the inventors.