PER PROCESSOR SET SCHEDULING

Patent №

US 7,793,293

Granted

2010-09-07

Filed 2004

Owner

HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10979060

An arrangement, in a computer system, for coordinating scheduling of threads on a plurality of processor sets (PSETs). The arrangement includes a first processor set (PSET) having a first set of scheduling resources, the first set of scheduling resources. The arrangement further includes a second processor set (PSET) having a second set of scheduling resources. The first set of scheduling resources is configured to schedule threads assigned to the first PSET only among processors of the first PSET, and the second set of scheduling resources is configured to schedule threads assigned to the second PSET only among processors of the second PSET.

AI hardwareG06F 9/5083G06F 9/4881G06F 9/505G06F 2209/483

AI classification

AI hardware0.95
Machine learning0.07
Knowledge representation0.02
Planning0.01
Natural language0.00
Evolutionary computation0.00
Speech0.00
Vision0.00

Ownership

HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

assignment · 159490046

Assignors

NORTON, SCOTT J., KIM, KYUN J., KEKRE, SW APNEEL

On an employer assignment, the assignors are typically the inventors.

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