AUTOMATIC ISOLATION OF A DEFECT IN A PROGRAMMABLE LOGIC DEVICE

A defect is automatically isolated in an integrated circuit device having programmable logic and interconnect circuits. A sequence of configurations is created to route data in a pattern through the programmable logic and interconnect circuits. Each configuration within the sequence is determined (e.g., generated or selected from a plurality of pre-generated configurations) as a function of output data from a prior configuration in the sequence. For each configuration in the sequence, the programmable logic and interconnect circuits are configured with the configuration and an automatic test instrument routes data in the pattern through the programmable logic and interconnect circuits. For each configuration in the sequence, the output data from the programmable logic and interconnect circuits is assessed. For each configuration in the sequence, the assessed output data isolates the defect to a portion of the pattern for the configuration that is within the portion for a prior configuration in the sequence.