MANAGING YIELD FOR A PARALLEL PROCESSING INTEGRATED CIRCUIT

Patent №

US 7,804,504

Granted

2010-09-28

Filed 2005

Owner

MASSACHUSETTS INSTITUTE OF TECHNOLOGY

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

11302962

A method for manufacturing an integrated circuit is described. The integrated circuit comprises a plurality of tiles, each tile comprising a processor and a switch coupled to neighboring tiles to form a network of tiles. The method includes identifying at least one tile that includes a fault, and forming data paths through one or more tiles to preserve communication in the network.

AI hardwareG06F 15/8007G06F 9/30123G06F 9/30189G06F 9/3851G06F 13/28G06F 15/17381G06F 15/7867G06F 15/80+4 more

AI classification

AI hardware0.95
Evolutionary computation0.07
Machine learning0.02
Planning0.02
Knowledge representation0.00
Natural language0.00
Speech0.00
Vision0.00

Ownership

MASSACHUSETTS INSTITUTE OF TECHNOLOGY

assignment · 177000892

Assignors

AGARWAL, ANANT

On an employer assignment, the assignors are typically the inventors.

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