Patent US 7,904,657

Patent №

US 7,904,657

Granted

Owner

Lab

AI components

1

hardware

Assignment

None on record

Dataset

AIPD

2023_r1 edition

Application

11779749

The present invention proposes a novel cache residence prediction mechanism that predicts whether requested data of a cache miss can be found in another cache. The memory controller can use the prediction result to determine if it should immediately initiate a memory access, or initiate no memory access until a cache snoop response shows that the requested data cannot be supplied by a cache.The cache residence prediction mechanism can be implemented at the cache side, the memory side, or both. A cache-side prediction mechanism can predict that data requested by a cache miss can be found in another cache if the cache miss address matches an address tag of a cache line in the requesting cache and the cache line is in an invalid state. A memory-side prediction mechanism can make effective prediction based on observed memory and cache operations that are recorded in a prediction table.

AI hardwareG06F 12/0831G06F 12/0893G06F 2212/507

AI classification

AI hardware1.00
Machine learning0.08
Knowledge representation0.00
Natural language0.00
Speech0.00
Evolutionary computation0.00
Vision0.00
Planning0.00
© 2026 NYSGPT2525 LLC