INSTRUCTION-LEVEL MULTITHREADING ACCORDING TO A PREDETERMINED FIXED SCHEDULE IN AN EMBEDDED PROCESSOR USING ZERO-TIME CONTEXT SWITCHING

A system and method for enabling multithreading in a embedded processor, invoking zero-time context switching in a multithreading environment, scheduling multiple threads to permit numerous hard-real time and non-real time priority levels, fetching data and instructions from multiple memory blocks in a multithreading environment, and enabling a particular thread to modify the multiple states of the multiple threads in the processor core.