Patent №
US 7,933,747
Granted
2011-04-26
Filed 2007
Owner
CADENCE DESIGN SYSTEMS, INC.
Lab
—
AI components
2
evo · hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
11935969
Method and system are disclosed for modeling dynamic behavior of a transistor. The method includes representing static behavior of a transistor using a lookup table, selecting an instance of the transistor from the lookup table for modeling dynamic behavior of the transistor, computing a previous state of the instance using a non-quasi static analytical model, computing a variation in channel charge of the instance according to a rate of change in time, computing a current state of the instance using the previous state and the variation in channel charge, computing a modified terminal voltage that includes a dynamic voltage across a parasitic resistance at the terminal of the transistor according to the current state and previous state of the instance, and storing the modified terminal voltage in a memory device for modeling dynamic behavior of the transistor at the current state.
AI classification
Ownership
CADENCE DESIGN SYSTEMS, INC.
assignment · 200760166
Assignors
MA, YATAO, JENG, MIN-CHIE, MCGAUGHY, BRUCE W., WU, LIFENG, LIU, ZHIHONG
On an employer assignment, the assignors are typically the inventors.