Patent №
US 7,996,595
Granted
2011-08-09
Filed 2009
Owner
LSTAR TECHNOLOGIES LLC
+2 more
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
12423368
Technologies are generally described herein for handling interrupts within a multiprocessor computing system. Upon receiving an interrupt at the multiprocessor computing system, a priority level associated with an interrupt handler for the interrupt can be determined. Current task priority levels can be queried from one or more processors of the multiprocessor computing system. One of the processors can be assigned to execute the interrupt handler in response to the processor having a lowest current task priority level. Interrupt arbitration can schedule and communicate interrupt responses among processor cores in a multiprocessor computing system. Arbitration can query information about current task or thread priorities from a set of processor cores upon receiving an interrupt. The processor core that is currently idle or running the lowest priority task may be selected to service the interrupt.
AI classification
Ownership
LSTAR TECHNOLOGIES LLC
assignment · 264930275
EMPIRE TECHNOLOGY DEVELOPMENT LLC
assignment · 273170971
MERCURY KINGDOM ASSETS LIMITED
assignment · 533780053
Assignors
WOLFE, ANDREW
On an employer assignment, the assignors are typically the inventors.