Patent №
US 7,999,717
Granted
2011-08-16
Filed 2009
Owner
SONY CORPORATION
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
12439757
A folding circuit and an analog-to-digital converter wherein a response to small signals is improved, a load on a clock signal can be reduced, and the increase of circuit area can be prevented. The circuit includes a reference voltage generating circuit that generates a plurality of differential voltages as reference voltages, and a plurality of amplification circuits that convert differential voltages between the plurality of reference voltages and an analog input voltage to differential currents, and output these differential currents. The output ends of the amplification circuits are alternately connected. Each of the amplification circuit is configured by a differential amplifier circuit having cascode output transistors (145, 146). A switch (144), which is turned on in synchronization with the control clock, is provided between the both sources of the cascode output transistors (145,146).
AI classification
Ownership
SONY CORPORATION
assignment · 223370766
Assignors
OHKAWA, TAKESHI, ONO, KOICHI, MATSUURA, KOUJI, YAMASHITA, YUKITOSI, TOYOMURA, JUNJI, NAKAMURA, SHOGO, KANAGAWA, NORIFUMI
On an employer assignment, the assignors are typically the inventors.