DETERRING REVERSE ENGINEERING

Patent №

US 8,024,688

Granted

2011-09-20

Filed 2008

Owner

XILINX, INC.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

12333594

A method for detecting reverse engineering of a configuration bitstream for an integrated circuit is described. A user design is obtained. It is determined if the user design is a degenerate design. If the user design is a degenerate design, it is determined if a trip point for bitstream generation has been tripped. If the trip point for the bitstream generation has not been tripped, deterrence information is updated and the bitstream generation is allowed to take place. If the trip point for the bitstream generation has been tripped, at least one reverse engineering countermeasure is initiated.

AI classification

AI hardware0.74
Knowledge representation0.14
Evolutionary computation0.11
Planning0.09
Natural language0.00
Vision0.00
Speech0.00
Machine learning0.00

Ownership

XILINX, INC.

assignment · 219710133

Assignors

TRIMBERGER, STEPHEN M.

On an employer assignment, the assignors are typically the inventors.

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