Patent US 8,074,191

A method of designing an integrated circuit for use in an application having standards having a plurality of primitives, wherein each of the primitives has a corresponding response. The method includes generating a macros description of each of the primitives and the response corresponding to each of the primitives, generating a template relating to the response corresponding to each of the primitives, receiving information specifying a behavior of the integrated circuit in response to the primitives based on the template, and generating a hardware description language representation for the integrated circuit based on the macros description and the information.