SEMICONDUCTOR DEVICE INCLUDING A TEST CIRCUIT OF A MULTIVALUED LOGIC CIRCUIT HAVING AN IMPEDANCE CONTROL

A semiconductor device, having a test circuit of a multivalued logic circuit without newly provision of an output terminal for a test signal, and with no increase in transmission delay in an output signal, includes an n-valued input terminal, and comparators that operate at different threshold voltages in response to input signals which have been input to the n-valued input terminal, respectively, and also includes an impedance control circuit that is connected to the n-valued input terminal and outputs of the comparators, respectively, and changes a combine resistance value in response to the output signals of the comparators to change a current flowing in the n-valued input terminal.