NETWORK DELAY ANALYSIS INCLUDING PARALLEL DELAY EFFECTS

Patent №

US 8,095,649

Granted

2012-01-10

Filed 2008

Owner

OPNET TECHNOLOGIES, INC.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

12060271

A multi-functional graphical user interface facilitates the analysis and assessment of application delays, including delays that occur on multiple paths. A trace file of an application's network events is processed to categorize the causes of delays incurred in the propagation and processing of these events. The system identifies the amount of delay (‘component delay’) that can be eliminated by eliminating each of the components of delay individually, as well as the amount of delay (‘parallel delay’) that can be eliminated by eliminating combinations of the delay components. A user interface displays the amount of reduction that can be achieved by eliminating each component delay individually and the amount of reduction that can be achieved by eliminating combinations of the individual component delays. To facilitate the analysis and assessment of these potential reductions, the interface allows the user to ‘drill down’ to view the individual delay components contained in each combination forming the parallel delays. In this manner, the user is provided a view of each of the delay components that would need to be addressed, either individually or in combination, to improve the overall application delay.

AI hardwareH04L 43/0852H04L 43/045H04L 69/28

AI classification

AI hardware0.99
Planning0.04
Natural language0.01
Knowledge representation0.00
Machine learning0.00
Speech0.00
Evolutionary computation0.00
Vision0.00

Ownership

OPNET TECHNOLOGIES, INC.

assignment · 207300854

Assignors

NIEMCZYK, STEVEN, MALLOY, PATRICK J, COHEN, ALAIN J, ELSNER, RUSSELL MARK

On an employer assignment, the assignors are typically the inventors.

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