Patent №
US 8,095,842
Granted
2012-01-10
Filed 2009
Owner
ANRITSU CORPORATION
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
12510423
In a random error signal generator, an M-sequence generation circuit outputs, in parallel, pieces of bit data stored in each register, a first generation circuit sequentially outputs first reference values C which are changed by a predetermined value in response to clocks, a second generation circuit outputs a second reference value D which is shifted from the first reference value C by a range value E which is determined depending on an error rate p. A comparison and determination unit outputs random error signals to be error bits when a numeric value A of the bit data output exists between the first and second reference values C, D. The random error signal has the error rate p, the number of times of error occurrences follows Poisson distribution, and a distribution of adjacent error occurrence intervals follows a geometric distribution.
AI classification
Ownership
ANRITSU CORPORATION
assignment · 230130592
Assignors
FURUYA, TAKASHI, KURODA, MASAHIRO, SHIMOTAHIRA, HIROSHI
On an employer assignment, the assignors are typically the inventors.