LOW COMPLEXITY DECODING OF LOW DENSITY PARITY CHECK CODES

Patent №

US 8,095,863

Granted

2012-01-10

Filed 2010

Owner

Lab

AI components

1

hardware

Assignment

None on record

Dataset

AIPD

2023_r1 edition

Application

12963321

An improved decoder and decoding method for low density parity check (LDPC) codes is provided. Decoding proceeds by repetitive message passing from a set of variable nodes to a set of check nodes, and from the check nodes back to the variable nodes. The variable node output messages include a “best guess” as to the relevant bit value, along with a weight giving the confidence in the, guess. The check node output messages have magnitudes selected from a predetermined set including neutral, weak, medium and strong magnitudes. The check node output messages tend to reinforce the status quo of the input variable nodes if the check node parity check is satisfied, and tend to flip bits in the input variable nodes if the check node parity check is not satisfied. The variable node message weights are used to determine the check node message magnitudes.

AI hardwareH03M 13/1105H03M 13/1108

AI classification

AI hardware1.00
Machine learning0.37
Vision0.05
Speech0.00
Knowledge representation0.00
Planning0.00
Natural language0.00
Evolutionary computation0.00
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