Patent №
US 8,166,255
Granted
2012-04-24
Filed 2011
Owner
—
Lab
—
AI components
2
planning · hardware
Assignment
None on record
Dataset
AIPD
2023_r1 edition
Application
13009582
A method for performing a transaction including a transaction head and a transaction tail, includes executing the transaction head, including executing at least one memory reserve instruction to reserve a transactional memory location that are accessed in the transaction and executing the transaction tail, wherein the transaction cannot be aborted due to a data race on that transactional memory location while executing the transaction tail, wherein data of memory write operations to the transactional memory location is committed without being buffered.