Patent №
US 8,166,321
Granted
—
Owner
—
Lab
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AI components
1
hardware
Assignment
None on record
Dataset
AIPD
2023_r1 edition
Application
12150386
A coprocessor executing one among a set of candidate kernel loops within an application operates at the minimal clock frequency satisfying schedule constraints imposed by the compiler and data bandwidth constraints. The optimal clock frequency is statically determined by the compiler and enforced at runtime by software-controlled clock circuitry. Power dissipation savings and optimal resource usage are therefore achieved by the adaptation at runtime of the coprocessor clock rate for each of the various kernel loop implementations.