RESULT FORWARDING TO DEPENDENT INSTRUCTION IN PIPELINED PROCESSOR WITH MODE SELECTABLE EXECUTION IN E1 OR E2 PIPELINED OPERATIONAL STAGES
Patent №
US 8,190,860
Granted
2012-05-29
Filed 2010
Owner
—
Lab
—
AI components
1
hardware
Assignment
None on record
Dataset
AIPD
2023_r1 edition
Application
12872771
A method includes providing a data processor having an instruction pipeline, where the instruction pipeline has a plurality of instruction pipeline stages, and where the plurality of instruction pipeline stages includes a first instruction pipeline stage and a second instruction pipeline stage. The method further includes providing a data processor instruction that causes the data processor to perform a first set of computational operations during execution of the data processor instruction, performing the first set of computational operations in the first instruction pipeline stage if the data processor instruction is being executed and a first mode has been selected, and performing the first set of computational operations in the second instruction pipeline stage if the data processor instruction is being executed and a second mode has been selected.