Patent №
US 8,250,342
Granted
2012-08-21
Filed 2008
Owner
XILINX, INC.
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
12008352
Architecture of a digital signal processing engine and method for digital signal processing therewith are described. Instruction memory stores an instruction which has at least one opcode which is selected from a group consisting of a control opcode, a digital signal processing (DSP) opcode, and a memory opcode. A digital signal processing engine includes a controller for receiving the control opcode, a DSP core for receiving the DSP opcode, and a memory interface for receiving the memory opcode. The controller, the digital signal processing core, and the memory interface are separate pipelines at least two of which have different numbers of stages. The controller may include an arithmetic logic unit, a base address regfile, and a branch/decode circuit.
AI classification
Ownership
XILINX, INC.
assignment · 203890047
Assignors
KOSTARNOV, IGOR, WALKE, RICHARD
On an employer assignment, the assignors are typically the inventors.