IMPLEMENTING DIVISION IN A PROGRAMMABLE INTEGRATED CIRCUIT DEVICE

Division can be performed in a programmable integrated circuit device by computing a relatively small number of bits of the inverse of the divisor, and then programming multipliers in a specialized processing block of the device to perform multiplication of the dividend and the inverted divisor. The specialized processing block is constructed to be able to be programmed to support such asymmetric multiplication by providing programmable shifting of partial products, so that the partial products can be shifted one number of bits for symmetric multiplication and a different number of bits for asymmetric multiplication. The process is performed recursively, by chaining a plurality of the specialized processing blocks, so that the result converges notwithstanding the relatively low precision of the inverted divisor.