PROCESSOR DECODING EXTENSION INSTRUCTION TO STORE PLURAL ADDRESS EXTENSION INFORMATION IN EXTENSION REGISTER FOR PLURAL SUBSEQUENT INSTRUCTIONS

A processing unit has an extended register to which instruction extension information indicating an extension of an instruction can be set. An operation unit that, when instruction extension information is set to the extended register, executes a subsequent instruction following a first instruction for writing the instruction extension information into the extended register, extends the subsequent instruction based on the instruction extension information.