ACCELERATING MODEL CHECKING VIA SYNCHRONY

Patent №

US 8,286,137

Granted

2012-10-09

Filed 2008

Owner

NEC LABORATORIES AMERICA, INC.

Lab

AI components

4

ml · kr · planning · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

12054575

A system and method for program verification by model checking in concurrent programs includes modeling each of a plurality of program threads as a circuit model, and generating a full circuit for an entire program by combining the circuit models including constraints which enforce synchronous execution of the program threads. The program is verified using the synchronous execution to reduce an amount of memory needed to verify the program and a number of steps taken to uncover an error.

AI classification

Planning1.00
Knowledge representation1.00
AI hardware0.93
Machine learning0.71
Natural language0.02
Speech0.01
Evolutionary computation0.00
Vision0.00

Ownership

NEC LABORATORIES AMERICA, INC.

assignment · 209390673

Assignors

KAHLON, VINEET, GUPTA, AARTI

On an employer assignment, the assignors are typically the inventors.

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