DATA PROCESSING HARDWARE

Embodiments include a hardware accelerator for non-negative matrix factorization (NMF), in particular for driving an OLED display. The hardware accelerator determines a oair of factor matrices (R;C) which when multiplied together approximate a target matrix. Each factor matrix R, C has multiple data buses each associated with a respective block of memory and there is a matrix of processor blocks and an associated memory block storing a portion of a matrix (Q) representing a difference between a product of the pair of factor matrices and the target matrix. Control circuitry controls the reading and writing of data between the various elements to perform the matrix factorisation.