TRANSACTIONAL MEMORY IN OUT-OF-ORDER PROCESSORS WITH XABORT HAVING IMMEDIATE ARGUMENT

Patent №

US 8,301,849

Granted

2012-10-30

Filed 2009

Owner

INTEL CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

12646781

Methods, systems, and apparatuses to provide an XABORT in a transactional memory access system are described. In one embodiment, the stored value is a context value indicating the context in which a transactional memory execution was aborted. A fallback handler may use the context value to perform a series of operations particular to the context in which the abort occurred.

AI hardwareG06F 9/466G06F 9/30087G06F 9/3834G06F 9/3854G06F 9/3858G06F 9/5016

AI classification

AI hardware0.95
Planning0.36
Natural language0.01
Knowledge representation0.01
Machine learning0.00
Evolutionary computation0.00
Speech0.00
Vision0.00

Ownership

INTEL CORPORATION

assignment · 242870573

Assignors

RAJWAR, RAVI, DIXON, MARTIN G., LAI, KONRAD K.

On an employer assignment, the assignors are typically the inventors.

From the same owner

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