AUTOMATIC DEBUG APPARATUS AND METHOD FOR AUTOMATIC DEBUG OF AN INTEGRATED CIRCUIT DESIGN

A computerized method of characterizing a DUV includes executing in a verification environment (VE) a set of verification tests to stimulate the DUV to collect test results from the DUV. The method further includes collecting a set of failure data for the test results; and generating sets of common failures based on clusters of features of interest in the set of failure data. The method further includes generating a set of hints from the common failures; wherein the hints indicate a potential failure mode or a potential root cause failure of the DUV for the test results for the simplified set of tests; and generating a set of debug data from the clusters of features of interest. The method further includes transferring the set of hints and the set of debug data to a user computer for storage, display, and use in an interactive debug session of the DUV.