POWER SAVINGS WITH MULTIPLE READOUT CIRCUITS

An imager with a switch circuit located between, and connected to, the pixel array and associated readout chains. In one embodiment the switch is located within the column sample and hold circuitry; in another embodiment the switch is located between the column sample and hold circuitry and the readout chains. The switch circuit ensures that signals from the column sample and hold circuitry are directed to enabled readout chains, which allows selective enabling/disabling of readout chains. By disabling readout chains, the imager's power consumption is reduced.