METHOD AND SYSTEM FOR VERIFYING ELECTRONIC DESIGNS HAVING SOFTWARE COMPONENTS

Patent №

US 8,326,592

Granted

2012-12-04

Filed 2008

Owner

CADENCE DESIGN SYSTEMS, INC.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

12340670

Disclosed is a method and system for providing an improved and flexible approach for handling models of hardware and software designs for verification activities. The semantics of the software and hardware are mapped to allow correct interfacing between the hardware and software models. This allows designers to more efficiently and accurately perform hardware/software co-verification.

AI hardwareG06F 30/33G06F 2117/08

AI classification

AI hardware1.00
Planning0.35
Speech0.21
Machine learning0.04
Evolutionary computation0.02
Knowledge representation0.02
Natural language0.01
Vision0.00

Ownership

CADENCE DESIGN SYSTEMS, INC.

assignment · 220110317

Assignors

MCMILLAN, KENNETH

On an employer assignment, the assignors are typically the inventors.

From the same owner

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