Patent №
US 8,380,935
Granted
2013-02-19
Filed 2009
Owner
CRAY INC.
Lab
—
AI components
2
kr · hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
12484165
An atomic memory operation cache comprises a cache memory operable to cache atomic memory operation data, a write timer, and a cache controller. The cache controller is operable to update main memory with one or more dirty atomic memory operation cache entries stored in the cache memory upon expiration of the write timer, and is further operable to update main memory with one or more dirty atomic memory operation cache entries stored in the cache memory upon eviction of the one or more dirty atomic memory operation cache entries from the cache memory.
AI classification
Ownership
CRAY INC.
assignment · 230310566
Assignors
ABTS, DENNIS C., SCOTT, STEVEN L.
On an employer assignment, the assignors are typically the inventors.