METHOD FOR FLOATING POINT ROUND TO INTEGER OPERATION

Patent №

US 8,407,271

Granted

2013-03-26

Filed 2009

Owner

ADVANCED MICRO DEVICES, INC.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

12549724

An apparatus and method for computing a rounded floating point number. A floating point unit (FPU) receives an instruction to round a floating point number to a nearest integral value and retrieves a binary source operand having an exponent of a fixed first number of bits and a mantissa of a fixed second number of bits. If the unbiased exponent value is greater than or equal to zero and less than the fixed second number, the FPU generates a mask having N consecutive ‘1’ bits beginning with the least significant bit and whose remaining bits have a value of ‘0’, where N is equal to the fixed second number minus the unbiased exponent value. The FPU computes a bitwise OR of the source operand with the mask, increments the result if the instruction is to round up, and computes a bitwise AND of the result with the inverse of the mask.

AI classification

AI hardware0.81
Vision0.15
Knowledge representation0.00
Planning0.00
Evolutionary computation0.00
Natural language0.00
Machine learning0.00
Speech0.00

Ownership

ADVANCED MICRO DEVICES, INC.

assignment · 231750717

Assignors

HURD, KEVIN, LIEU, DARYL, GOVEAS, KELVIN, HILKER, SCOTT

On an employer assignment, the assignors are typically the inventors.

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