METHOD FOR MANAGING BRANCH INSTRUCTIONS AND A DEVICE HAVING BRANCH INSTRUCTION MANAGEMENT CAPABILITIES

Patent №

US 8,533,441

Granted

2013-09-10

Filed 2008

Owner

FREESCALE SEMICONDUCTOR, INC.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

12190291

A method for managing branch instructions, the method includes: providing, to pipeline stages of a processor, multiple variable length groups of instructions; wherein each pipeline stage executes a group of instruction during a single execution cycle; receiving, at a certain execution cycle, multiple instruction fetch requests from multiple pipeline stages, each pipeline stage that generates an instruction fetch request stores a variable length group of instructions that comprises a branch instruction; sending to the fetch unit an instruction fetch command that is responsive to a first in order branch instruction in the pipeline stages; wherein if the first in order fetch command is a conditional fetch command then the instruction fetch command comprises a resolved target address; wherein the sending of the instruction fetch command is restricted to a single instruction fetch command per a single execution cycle.

AI hardwareG06F 9/3885G06F 9/30094G06F 9/3804G06F 9/3844

AI classification

AI hardware0.99
Natural language0.00
Planning0.00
Evolutionary computation0.00
Machine learning0.00
Vision0.00
Knowledge representation0.00
Speech0.00

Ownership

FREESCALE SEMICONDUCTOR, INC.

assignment · 240140399

From the same owner

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