Optimizing performance of instructions based on sequence detection or information associated with the instructions

Patent №

US 8,543,796

Granted

2013-09-24

Filed 2008

Owner

INTEL CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

12290962

In one embodiment, the present invention includes an instruction decoder that can receive an incoming instruction and a path select signal and decode the incoming instruction into a first instruction code or a second instruction code responsive to the path select signal. The two different instruction codes, both representing the same incoming instruction may be used by an execution unit to perform an operation optimized for different data lengths. Other embodiments are described and claimed.

AI hardwareG06F 9/30145G06F 9/30032G06F 9/30043G06F 9/3017G06F 9/30181G06F 9/325G06F 9/3854G06F 9/3856+1 more

AI classification

AI hardware0.99
Natural language0.04
Speech0.00
Machine learning0.00
Vision0.00
Evolutionary computation0.00
Knowledge representation0.00
Planning0.00

Ownership

INTEL CORPORATION

assignment · 235120414

Assignors

FALIK, OHAD, RAPPOPORT, LIHU, GABOR, RON, KUROLAP, YULIA, MISHAELI, MICHAEL

On an employer assignment, the assignors are typically the inventors.

From the same owner

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