Optimizing performance of instructions based on sequence detection or information associated with the instructions
Patent №
US 8,543,796
Granted
2013-09-24
Filed 2008
Owner
INTEL CORPORATION
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
12290962
In one embodiment, the present invention includes an instruction decoder that can receive an incoming instruction and a path select signal and decode the incoming instruction into a first instruction code or a second instruction code responsive to the path select signal. The two different instruction codes, both representing the same incoming instruction may be used by an execution unit to perform an operation optimized for different data lengths. Other embodiments are described and claimed.
AI classification
Ownership
INTEL CORPORATION
assignment · 235120414
Assignors
FALIK, OHAD, RAPPOPORT, LIHU, GABOR, RON, KUROLAP, YULIA, MISHAELI, MICHAEL
On an employer assignment, the assignors are typically the inventors.