DECODER AND DECODING METHOD FOR LOW-DENSITY PARITY CHECK CODES CONSTRUCTED BASED ON REED-SOLOMON CODES
Patent №
US 8,549,375
Granted
2013-10-01
Filed 2010
Owner
NATIONAL TSING HUA UNIVERSITY
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
12945597
Configurable permutators in an LDPC decoder are provided. A partially-parallel architecture combined with the proposed permutators is used to mitigate the increase in implementation complexity for the multi-mode function. To overcome the difficulty in efficient implementation of a high-throughput decoder, the variable nodes are partitioned into several groups, and each group is processed sequentially in order to shorten the critical-path delay and, hence, increase the maximum operating frequency. In addition, shuffled message-passing decoding can be adopted in decoders according to the invention to increase the convergence speed, which reduces the number of iterations required to achieve a given bit-error-rate performance.
AI classification
Ownership
NATIONAL TSING HUA UNIVERSITY
assignment · 253620463
Assignors
UENG, YEONG-LUH, WANG, KUAN-CHIEH, CHEN, CHUN-JUNG, YANG, TSUNG-CHIEH
On an employer assignment, the assignors are typically the inventors.