CACHE MEMORY ALLOCATION PROCESS BASED ON TCPIP NETWORK AND/OR STORAGE AREA NETWORK ARRAY PARAMETERS
Patent №
US 8,601,210
Granted
2013-12-03
Filed 2011
Owner
LSI CORPORATION
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
13073045
An apparatus comprising a controller, one or more host devices and one or more storage devices. The controller may be configured to store and/or retrieve data in response to one or more input/output requests. The one or more host devices may be configured to present the input/output requests. The one or more storage devices may be configured to store and/or retrieve the data. The controller may include a cache memory configured to store the input/output requests. The cache memory may be configured as a memory allocation table to store and/or retrieve a compressed version of a portion of the data in response to one or more network parameters. The compressed version may be retrieved from the memory allocation table instead of the storage devices based on the input/output requests to improve overall storage throughput.
AI classification
Ownership
LSI CORPORATION
assignment · 260310025
Assignors
JIBBE, MAHMOUD K., CHAKHAIYAR, MADHUKAR G., DWIVEDI, HIMANSH
On an employer assignment, the assignors are typically the inventors.