Rate Adaptive Nonbinary LDPC Codes With Low Encoding Complexity

Patent №

US 8,656,244

Granted

2014-02-18

Filed 2011

Owner

MASSACHUSETTS INSTITUTE OF TECHNOLOGY

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

13284349

Described herein is a method and system that provides a class of error correction codes which can be used in communication systems to correct errors which may be introduced by a communication channel. In particular, a “staircase matrix” or “staircase LDPC code” is defined that enables performance gains associated with nonbinary LDPC codes while requiring low encoding complexity. Also, the concepts, systems and techniques described herein allow for implementation of a single encoder and decoder structure which can realize arbitrary rational coding rates, thus enabling a communication system to easily adapt a coding rate to different coding requirements.

AI hardwareH03M 13/1171H03M 13/1185H03M 13/611H03M 13/6356H03M 13/6368

AI classification

AI hardware0.82
Vision0.03
Machine learning0.01
Speech0.01
Evolutionary computation0.00
Natural language0.00
Knowledge representation0.00
Planning0.00

Ownership

MASSACHUSETTS INSTITUTE OF TECHNOLOGY

assignment · 271620369

Assignors

CHANG, NICHOLAS B.

On an employer assignment, the assignors are typically the inventors.

© 2026 NYSGPT2525 LLC