Multi-Level LDPC Layer Decoder

Patent №

US 8,656,249

Granted

2014-02-18

Filed 2011

Owner

LSI CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

13227416

Various embodiments of the present invention provide methods and apparatuses for multi-level layer decoding of non-binary LDPC codes. For example, an apparatus is disclosed for layer decoding of multi-level low density parity check encoded data. The apparatus includes a low density parity check decoder operable to perform layered decoding of a plurality of circulant submatrices from an H matrix. The apparatus also includes a parity check calculator connected to the low density parity check decoder, operable to detect whether a stopping criterion has been met in the low density parity check decoder. The low density parity check decoder is also operable to end a decoding operation at less than a maximum number of iterations when the stopping criterion is met.

AI hardwareH03M 13/114H03M 13/116H03M 13/1171

AI classification

AI hardware1.00
Planning0.01
Knowledge representation0.01
Machine learning0.00
Vision0.00
Natural language0.00
Evolutionary computation0.00
Speech0.00

Ownership

LSI CORPORATION

assignment · 268680967

Assignors

CHEN, LEI, YEN, JOHNSON, YANG, SHAOHUA

On an employer assignment, the assignors are typically the inventors.

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