NONVOLATILE MEMORY WITH WRITE CACHE HAVING FLUSH/EVICTION METHODS

Patent №

US 8,700,840

Granted

2014-04-15

Filed 2009

Owner

SANDISK CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

12348895

A portion of a nonvolatile memory is partitioned from a main multi-level memory array to operate as a cache. The cache memory is configured to store at less capacity per memory cell and finer granularity of write units compared to the main memory. In a block-oriented memory architecture, the cache has multiple functions, not merely to improve access speed, but is an integral part of a sequential update block system. Decisions to archive data from the cache memory to the main memory depend on the attributes of the data to be archived, the state of the blocks in the main memory portion and the state of the blocks in the cache portion.

AI hardwareG06F 12/0866G06F 12/0246G06F 12/0804G11C 11/5628G06F 2212/7203G06F 2212/7204G11C 2211/5641Y02D 10/00

AI classification

AI hardware1.00
Speech0.07
Knowledge representation0.04
Natural language0.00
Machine learning0.00
Vision0.00
Evolutionary computation0.00
Planning0.00

Ownership

SANDISK CORPORATION

assignment · 224040105

Assignors

PALEY, ALEXANDER, GOROBETS, SERGEY ANATOLIEVICH, ZILBERMAN, EUGENE, BENNETT, ALAN DAVID, TRAISTER, SHAI, TOMLIN, ANDREW, WU, WILLIAM S., SO, BUM SUCK

On an employer assignment, the assignors are typically the inventors.

From the same owner

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