METHODS, SYSTEMS, AND ARTICLES OF MANUFACTURE FOR ROUTING AN ELECTRONIC DESIGN USING SPACETILES

Various embodiments identify a routing layer of an electronic design, create spacetile(s) by performing spacetile punch(es) for the routing layer, identify an area probe from the spacetile(s), and routes the electronic design by using the one or more area probes for performing area search for routing solutions. Some embodiments identify two routing layers of an electronic design, perform spacetile punch(es) to form spacetile(s) for the routing layers, determine a via spacetile layer, identify spacetile(s) as one or more area probes based on the via spacetile layer, and routes the electronic design by using the one or more area probes for performing area search for routing solutions while transitioning between the two routing layers. One of the two routing layers may be a tracked routing layer, and the other may be a trackless routing layer. The tracked routing may be gridded or gridless.