REPLACING CACHE LINES IN A CACHE MEMORY BASED AT LEAST IN PART ON CACHE COHERENCY STATE INFORMATION

Patent №

US 8,990,506

Granted

2015-03-24

Filed 2009

Owner

INTEL CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

12639191

In one embodiment, the present invention includes a cache memory including cache lines that each have a tag field including a state portion to store a cache coherency state of data stored in the line and a weight portion to store a weight corresponding to a relative importance of the data. In various implementations, the weight can be based on the cache coherency state and a recency of usage of the data. Other embodiments are described and claimed.

AI hardwareG06F 12/121G06F 12/084G06F 12/126

AI classification

AI hardware0.92
Knowledge representation0.03
Natural language0.01
Speech0.00
Machine learning0.00
Planning0.00
Vision0.00
Evolutionary computation0.00

Ownership

INTEL CORPORATION

assignment · 236610709

Assignors

CHERUKURI, NAVEEN, BRZEZINSKI, DENNIS W., SCHOINAS, IONNIS T., SHAYESTEH, ANAHITA, KUMAR, AKHILESH, AZIMI, MANI

On an employer assignment, the assignors are typically the inventors.

From the same owner

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